
PIC18F2458/2553/4458/4553
DS39887C-page 20
2009 Microchip Technology Inc.
PORTE is a bidirectional I/O port.
RE0/AN5/CK1SPP
RE0
AN5
CK1SPP
825
25
I/O
I
O
ST
Analog
—
Digital I/O.
Analog input 5.
SPP clock 1 output.
RE1/AN6/CK2SPP
RE1
AN6
CK2SPP
926
26
I/O
I
O
ST
Analog
—
Digital I/O.
Analog input 6.
SPP clock 2 output.
RE2/AN7/OESPP
RE2
AN7
OESPP
10
27
I/O
I
O
ST
Analog
—
Digital I/O.
Analog input 7.
SPP output enable output.
RE3
—
See MCLR/VPP/RE3 pin.
VSS
12,
31
6, 30,
31
6, 29
P
—
Ground reference for logic and I/O pins.
VDD
11, 32 7, 8,
28, 29
7, 28
P
—
Positive supply for logic and I/O pins.
VUSB
18
37
O
P
—
Internal USB transceiver power supply.
When the internal USB regulator is enabled, VUSB is
the regulator output.
When the internal USB regulator is disabled, VUSB
is the power input for the USB transceiver.
NC/ICCK/ICPGC(3)
ICCK
ICPGC
——
12
I/O
ST
No Connect or dedicated ICD/ICSP port clock.
In-Circuit Debugger clock.
ICSP programming clock.
NC/ICDT/ICPGD(3)
ICDT
ICPGD
——
13
I/O
ST
No Connect or dedicated ICD/ICSP port clock.
In-Circuit Debugger data.
ICSP programming data.
NC/ICRST/ICVPP(3)
ICRST
ICVPP
——
33
I
P
—
No Connect or dedicated ICD/ICSP port Reset.
Master Clear (Reset) input.
Programming voltage input.
NC/ICPORTS(3)
ICPORTS
—
34
P
—
No Connect or 28-pin device emulation.
Enable 28-pin device emulation when connected
to VSS.
NC
—
13
—
No Connect.
TABLE 1-3:
PIC18F4458/4553 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
PDIP QFN TQFP
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
I
= Input
O
= Output
P
= Power
Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
2: Default assignment for CCP2 when CCP2MX Configuration bit is set.
3: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.